1. Field of the Invention
This invention relates to semiconductor devices and, more particularly, to techniques for determining the slew rate of a signal produced by an integrated circuit.
2. Description of Background
Slew rate represents the maximum rate of change of signal at any point in an electronic circuit. Limitations in the slew rate capability of an integrated circuit may give rise to undesirable non-linear effects. For example, in order for a sinusoidal waveform not to be subject to slew rate limitations, the slew rate capability at all points in an amplifier or other circuit must exceed 2πfVpk, where f is the frequency, and Vpk is the peak value of the waveform. Slew rate is generally expressed in units of Volts per microseconds (μs). The output slew rate of an amplifier or other electronic circuit is defined as the maximum rate of change of the output voltage for all possible input signals.
  SR  =      max    ⁡          (                                            ⅆ                                          υ                out                            ⁡                              (                t                )                                                          ⅆ            t                                      )      where νout(t) is the output produced by the amplifier as a function of time t. As a practical matter, the slew rate of an amplifier may be measured using a square wave generator and an oscilloscope.
For purposes of illustration, an integrated circuit may utilize an input stage in the form of a differential amplifier having a transconductance characteristic. Transconductance refers to the input stage accepting a differential input voltage and, in response thereto, generating an output current in an additional stage. The transconductance of many integrated circuits is designed to be quite high, so as to provide a large amount of open loop gain. This high current gain means that a fairly small input voltage can cause the input stage to saturate, thereby producing a nearly constant output current. The additional stage of the integrated circuit may be utilized to implement a frequency compensation function. More specifically, the additional stage may have a low pass characteristic approximating an integrator. A constant current input will therefore produce a linearly increasing output. If the additional stage has a compensation capacitance C and gain A2, then slew rate in this example can be expressed as:
  SR  =            I      sat              CA      2      where Isat is the output current of the first stage in saturation.
In the case of complementary metal-oxide semiconductor (CMOS) integrated circuits, slew rate detection may be employed to provide an indication of short-circuit current flowing through a sink gate. If the slew rate is large, this signifies that a set of voltage pull-up semiconductor devices in the integrated circuit and a set of voltage pull-down semiconductor devices in the integrated circuit are partially on for the duration that a signal is greater than the threshold voltage (VTN) of an N-type field effect transistor (NFET), but less than the supply voltage (Vdd) minus the threshold voltage (VTP) of a P-type field effect transistor (PFET), thereby providing a low-resistance path between the supply voltage and ground. On the other hand, if the slew rate is small, this indicates that a signal may be susceptible to extraneous noise and coupling effects in the integrated circuit.
In the case of integrated circuits such as microprocessors, variations in process parameters and on-chip environmental conditions may cause the delay and leakage current of the microprocessor to vary significantly from a set of desired design values. Due to mismatches between two different types of semiconductor devices commonly used in the microprocessor, namely n-type metal-oxide semiconductor (NMOS) devices and p-type metal-oxide semiconductor (PMOS) devices, the microprocessor may operate at the intended design frequency but exhibit excessive leakage current. This observed phenomenon is attributable to the fact that some types of semiconductor devices are much faster (and much more leaky) than required, while other types of semiconductor devices are slower than required but only marginally less leaky than the faster devices. Thus, the delay impact of a performance variation may be minimal, whereas the power impact of a performance variation may be significant. Similarly, other microprocessors may fail to meet the target frequency but show nominal leakage power. Thus, it has become necessary to develop slew rate detectors that can detect mismatches between two different types of semiconductor devices. With the availability of such information, it is then possible to compensate for these mismatches and thus improve the yield of a given microprocessor design.
A few techniques have been proposed in recent years to detect the slew rate of an integrated circuit. For example, an inverter configuration may be employed which uses a fixed input bias of one-half the supply voltage. The deviation of the output voltage from the intended design point is then a representation of slew rate and device mismatch within the integrated circuit. However, this technique is only effective for characterizing a mismatch at one point on the current-voltage (I-V) curve for the device. Another technique utilizes multiple ring oscillators to detect the impact of semiconductor device mismatches on slew rate. These ring oscillators consume a significant amount of space and require the user to perform a manual calculation of device mismatch parameters, thus rendering this approach unsuitable for providing automatic mismatch compensation. In view of the foregoing shortcomings, what is needed is an improved technique for detecting the slew rate of an integrated circuit. Such a technique should enable detection of device mismatches and automatically generate an output signal that can be used for the purpose of providing mismatch compensation.